Senior CMOS analog/mixed signal design Engineer

Role Overview

We are looking for an experienced IC Design Engineer with strong expertise in

CMOS analog/mixed‑signal design

and

emerging NVM devices

to help develop FMC’s next‑generation ferroelectric memory products based on hafnium oxide technology. You will work in close collaboration with international teams in Milan or Dresden to turn innovative memory concepts into robust silicon. Must Have

CMOS IC design (Analog/Mixed Signal), NVM Device Design, Design tools: Cadence, Verilog, Programming Ability: C, Verilog, Digital Design Concepts Responsibilities

Design and develop emerging NVM memory devices

based on hafnium oxide technology for FMC’s ferroelectric memory product portfolio. Define specifications and support the integration of

analog and mixed‑signal blocks into the overall memory architecture. Design

analog circuits for NVM memories

(sense amplifiers, decoders, bandgaps, HV regulators, ADCs, etc.). Run PVT simulations and circuit verification, including parasitic extraction, to ensure performance and reliability. Collaborate closely with layout engineers to optimize robustness, matching, and area. Contribute to post‑silicon verification, debug, and optimization of memory IP and test chips. Your profile

5-10 Years of experience and a Degree in Electrical Engineering or related field. Strong background in

CMOS IC design (analog/mixed signal)

and

NVM device design . Hands‑on experience with

Cadence

design environment and

Verilog

for modeling or verification. Familiarity with standard design and simulation flows (e.g., Cadence DFII, Virtuoso, Spice, Verilog‑A). Relevant experience in analog/mixed‑signal CMOS and memory/NVM design. Good knowledge of CMOS device physics and circuit behavior over PVT. Strong problem‑solving skills and ability to work effectively in cross‑functional teams. Fluent in English.

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