Descrizione dell'offerta
STMicroelectronics is seeking a Senior Mixed Signal Verification Engineer to join the MEMS GROUP. You will define verification test benches and develop components for ASIC verification, spanning from specification to final product industrialization.
The role emphasizes analog/mixed-signal expertise with opportunities to lead within Castelletto (Italy) and Toulouse (France). The ideal candidate will have strong background in analog circuits, SystemVerilog, UVM, Python, and experience with Cadence
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Candidatura e Ritorno (in fondo)
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