Descrizione dell'offerta
Infineon Technologies AG in Italy invites a Senior Staff Engineer Verification to shape verification plans for digital blocks in Mixed Signal designs, using SystemVerilog, UVM, and modern verification tools. You will lead and coordinate other verification engineers, execute tests on RTL and gate-level, and mentor junior colleagues.
Collaborating with analog/digital designers and other verification teams, you will help evolve methodologies and flows, contributing to cutting-edge power and IoT
#J-18808-LjbffrCandidatura e Ritorno (in fondo)
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